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High-Speed Photodiodes in Standard CMOS Technology
High-speed Photodiodes in Standard CMOS Technology describes high-speed photodiodes in standard CMOS technology which allow monolithic integration of optical receivers for short-haul communication. For short haul communication the cost aspect is important , and therefore it is desirable that the optical receiver can be integrated in the same CMOS technology as the rest of the system. If this is possible then ultimately a singe-chip system including optical inputs becomes feasible, eliminating EMC and crosstalk problems, while data rate can be extremely high.
Highly Sensitive Optical Receivers
Highly Sensitive Optical Receivers primarily treats the circuit design of optical receivers with external photodiodes. Continuous-mode and burst-mode receivers are compared. The monograph first summarizes the basics of III/V photodetectors, transistor and noise models, bit-error rate, sensitivity and analog circuit design, thus enabling readers to understand the circuits described in the main part of the book. In order to cover the topic comprehensively, detailed descriptions of receivers for optical data communication in general and, in particular, optical burst-mode receivers in deep-sub-µm CMOS are presented. Numerous detailed and elaborate illustrations facilitate better understanding.
CMOS Multi-Channel Single-Chip Receivers for Multi-Gigabit Optical Data Communications
Focuses on optical communications for short and very short distance applications and discusses the monolithic integration of optical receivers with processing elements in standard CMOS technologies. CMOS Multi-Channel Single-Chip Receivers for Multi-Gigabit Optical Data Communications provides the reader with the necessary background knowledge to fully understand the trade-offs in short-distance communication receiver design and presents the key issues to be addressed in the development of such receivers in CMOS technologies. Moreover, novel design approaches are presented. A system-level design methodology allows for the impact analysis of different block specifications and system-wide design optimization. Statistical models are used for design space exploration in the scope of jitter tolerance analysis of clock recovery circuits.
