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Logics of Specification Languages
Dedicated chapters address : the use of ASM (Abstract State Machines) in the classroom; the Event-B modelling method; a methodological guide to CafeOBJ logic; CASL, the Common Algebraic Specification Language; the Duration Calculus; the logic of the RAISE specification language (RSL); the specification language TLA+; the typed logic of partial functions and the Vienna Development Method (VDM); and Z logic and its applications. Each chapter is self-contained, with references, and symbol and concept indexes. Finally, in a unique feature, the book closes with short commentaries on the specification languages written by researchers closely associated with their original development.
Automatic program development : A tribute to Robert Paige
This work, a tribute to renowned researcher Robert Paige, is a collection of revised papers published in his honor in the Higher-Order and Symbolic Computation Journal in 2003 and 2005. The book also includes some papers by members of the IFIP Working Group 2.1 of which Bob was an active member.
Applications and Theory of Petri Nets ; 29th International Conference, PETRI NETS 2008, Xi’an, China, June 23-27, 2008. Proceedings
This book constitutes the refereed proceedings of the 29th International Conference on Applications and Theory of Petri Nets and Other Models of Concurrency, PETRI NETS 2008, held in Xi'an, China, in June 2008.
Algebraic Methodology and Software Technology ; 12th International Conference, AMAST 2008 Urbana, IL, USA, July 28-31, 2008 Proceedings
This book constitutes the refereed proceedings of the 12th International Conference on Algebraic Methodology and Software Technology, AMAST 2008, held in Urbana, IL, USA, in July 2008.
A High-Performance Logical Framework -- All About Maude : How to Specify, Program, and Verify Systems in Rewriting Logic
This book gives a comprehensive account of Maude, a language and system based on rewriting logic. Many examples are used throughout the book to illustrate the main ideas and features of Maude, and its many possible uses. Maude modules are rewrite theories. Computation with such modules is - cient deduction by rewriting. Because of its logical basis and its initial model semantics,aMaude module defines a precise mathematical model.This means that Maude and its formal tool environment can be used in three, mutually reinforcing ways: • as a declarative programming language; • as an executable formal specification language; and • as a formal verification system. Maude’s rewriting logic is simple, yet very expressive. This gives Maude good representational capabilities as a semantic framework to formally represent a wide range of systems, including models of concurrency, distributed al- rithms, network protocols, semantics of programming languages, and models of cell biology. Rewriting logic is also an expressive universal logic,making Maude a fiexible logical framework in which many difierent logics and - ference systems can be represented and mechanized. This makes Maude a useful metatool to build many other tools, including those in its own formal tool environment. Thanks to the logic’s simplicity and the use of advanced semi-compilation techniques, Maude has a high-performance implementation, making it competitive with other declarative programming languages.
25 Years of Model Checking : History, Achievements, Perspectives
Model checking technology is among the foremost applications of logic to computer science and computer engineering. The model checking community has achieved many breakthroughs, bridging the gap between theoretical computer science and hardware and software engineering, and it is reaching out to new challenging areas such as system biology and hybrid systems. Model checking is extensively used in the hardware industry and has also been applied to the verification of many types of software. Model checking has been introduced into computer science and electrical engineering curricula at universities worldwide and has become a universal tool for the analysis of systems.
A Roadmap for Formal Property Verification
This book develops the answers to these questions and fits them into a roadmap for formal property verification – a roadmap that shows how to glue FPV technology into the traditional validation flow. A Roadmap for Formal Property Verification explores the key issues in this powerful technology through simple examples – you do not need any background on formal methods to read most parts of this book.
