Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
- Author
- Priyardarsan Patra, Elias Kougianos, Nagarajan Ranganathan, …
- Publication Year
- 2008
- Publisher
- Springer
- Language
- English
- Document Type
- Book
- Faculty / Subject Heading
- Engineering
- Download Book Read book
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits.
Keywords: Engineering / Architectural power estimation / CMOS / High-level synthesis / Logic gate levels / Low-power synthesis / Nanoscale CMOS / Transient power / Transistor
