الصفحة 1
الصفحة 1
Mobile Information Systems : Infrastructure and Design for Adaptivity and Flexibility
The book is divided into three parts: core technologies for mobile information systems (e.g., adaptive middleware and flexible e-services), enabling technologies (like data management on small devices or adaptive low-power hardware architectures or wireless networks), and methodological aspects of mobile information systems design (such as service profiling or user interface and e-service design for context-aware applications). It provides researchers in academia and industry with a comprehensive vision on innovative aspects which can be used as a basis for the development of new frameworks and applications.
Internet of things from hype to reality : The road to digitization
Presents updated material on its core content: an end-to-end IoT architecture that is comprised of devices, network, compute, storage, platform, applications along with management and security components. As with the second edition, it is organized into six main parts: an IoT reference model; fog computing and the drivers; IoT management and applications; smart services in IoT; IoT standards; and case studies. This edition’s features include overhaul of the IoT Protocols (Chapter 5) to include an expanded treatment of low-power wide area networks including narrow band IoT (NB-IoT) protocol, updated IoT platforms and capabilities (Chapter 7) to include comparison of commercially available platforms (e.g. AWS IoT Platform, Google Cloud IoT Platform, Microsoft Azure IoT Platform, and PTC ThinkWorx), updated security (Chapter 8) to include approaches for securing IoT devices with examples of IoT devices used in security attacks and associated solutions including MUD and DICE, and finally new Appendix B to include six IoT project detailed for students.
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ; Vol. 3728 ; 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings
Welcome to the proceedings of PATMOS 2005, the 15th in a series of international workshops.PATMOS2005wasorganizedbyIMECwithtechnicalco-sponsorshipfrom the IEEE Circuits and Systems Society. Over the years, PATMOS has evolved into an important European event, where - searchers from both industry and academia discuss and investigate the emerging ch- lenges in future and contemporary applications, design methodologies, and tools - quired for the developmentof upcominggenerationsof integrated circuits and systems. The technical program of PATMOS 2005 contained state-of-the-art technical contri- tions, three invited talks, a special session on hearing-aid design, and an embedded - torial. The technical program focused on timing, performance and power consumption, as well as architectural aspects with particular emphasis on modeling, design, char- terization, analysis and optimization in the nanometer era. The Technical Program Committee, with the assistance of additional expert revi- ers, selected the 74 papers to be presented at PATMOS. The papers were divided into 11 technical sessions and 3 poster sessions. As is always the case with the PATMOS workshops, the review process was anonymous, full papers were required, and several reviews were carried out per paper. Beyond the presentations of the papers, the PATMOS technical program was - riched by a series of speeches offered by world class experts, on important emerging research issues of industrial relevance. Prof. Jan Rabaey, Berkeley, USA, gave a talk on “Traveling the Wild Frontier of Ulta Low-Power Design”, Dr. Sung Bae Park, S- sung, gave a presentation on “DVL (Deep Low Voltage): Circuits and Devices”, Prof.
Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications
Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding.
Design of Wireless Autonomous Datalogger ICs
The book starts with a comprehensive introduction on the most important design aspects and trade-offs for miniaturized low-power telemetric dataloggers. After the general introduction follows an in-depth case study of an autonomous CMOS datalogger IC for the registration of in vivo loads on oral implants. After tackling the design of the datalogger on the system level, the design of the different building blocks is elaborated in detail, with emphasis on low power
Continuous-Time Sigma-Delta A/D Conversion : Fundamentals, Performance Limits and Robust Implementations
This comprehensive book deals with all relevant aspects arising during the analysis, design and simulation of the now widespread continuous-time implementations of sigma-delta modulators. The results of several years of research by the authors in the field of CT sigma-delta modulators are covered, including the analysis and modeling of different CT modulator architectures, CT/DT loop filter synthesis, a detailed error analysis of all components, and possible compensation/correction schemes for the non-ideal behavior in CT sigma-delta modulators. Guidance for obtaining low-power consumption and several practical implementations are also presented. It is shown that all the proposed new theories, architectures and possible correction techniques have been confirmed by measurements on discrete or integrated circuits. Quantitative results are also provided, thus enabling prediction of the resulting accuracy.
Machine Learning and Cognitive Computing for Mobile Communications and Wireless Networks
Communication and network technology has witnessed recent rapid development and numerous information services and applications have been developed globally. These technologies have high impact on society and the way people are leading their lives. The advancement in technology has undoubtedly improved the quality of service and user experience yet a lot needs to be still done. Some areas that still need improvement include seamless wide-area coverage, high-capacity hot-spots, low-power massive-connections, low-latency and high-reliability and so on. Thus, it is highly desirable to develop smart technologies for communication to improve the overall services and management of wireless communication. Machine learning and cognitive computing have converged to give some groundbreaking solutions for smart machines. With these two technologies coming together, the machines can acquire the ability to reason similar to the human brain. The research area of machine learning and cognitive computing cover many fields like psychology, biology, signal processing, physics, information theory, mathematics, and statistics that can be used effectively for topology management. Therefore, the utilization of machine learning techniques like data analytics and cognitive power will lead to better performance of communication and wireless systems.
Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS
At the system level, a novel systematic study on the full feedforward Sigma-Delta topology is presented in this book. As a design example, a fourth-order single-loop full feedforward Sigma-Delta modulator design in a 130-nm pure digital CMOS technology is presented. This design is the first design using the full feedforward Sigma-Delta topology and reaches the highest conversion speed among all the 1-V Sigma-Delta modulators to date.
Low-Power High-Speed ADCs for Nanometer CMOS Integration
Low-Power High-Speed ADCs for Nanometer CMOS Integration is about the design and implementation of ADC in nanometer CMOS processes that achieve lower power consumption for a given speed and resolution than previous designs, through architectural and circuit innovations that take advantage of unique features of nanometer CMOS processes. A phase lock loop (PLL) clock multiplier has also been designed using new circuit techniques and successfully tested.
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits.
Low Power Methodology Manual : For System-on-Chip Design
"Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach." "Excellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition to the field of low power SoC implementation that has for many years operated in a largely ad-hoc fashion."
Body Sensor Networks
While the problems of long-term stability and biocompatibility are being addressed, several promising prototypes are starting to emerge for managing patients with acute diabetes, for treatment of epilepsy and other debilitating neurological disorders and for monitoring of patients with chronic cardiac diseases. Despite the technological developments in sensing and monitoring devices, issues related to system integration, sensor miniaturization, low-power sensor interface circuitry design, wireless telemetric links and signal processing still have to be investigated.
Advanced memory optimization techniques for low-power embedded processors
this book explores a collaborative approach by proposing novel memory hierarchies and software optimization techniques for the optimal utilization of these memory hierarchies. Linking memory architecture design with memory-architecture aware compilation results in fast, energy-efficient and timing predictable memory accesses.The evaluation of the optimization techniques using real-life benchmarks for a single processor system, a multiprocessor system-on-chip (SoC) and for a digital signal processor system, reports significant reductions in the energy consumption and performance improvement of these systems. The book presents a wide range of optimizations, progressively increasing in the complexity of analysis and of memory hierarchies. The final chapter covers optimization techniques for applications consisting of multiple processes found in most modern embedded devices.
Adaptive Multi-Standard RF Front-Ends
Adaptive Multi-Standard RF Front-Ends investigates solutions, benefits, limitations and costs related to multi-standard operation of RF front-ends and their adaptivity to variable radio environments. Next, it highlights the optimization of RF front-ends that allow achieving of maximal performance with a certain power budget while targeting full integration. Also, it investigates possibilities for low-voltage low-power circuit topologies in CMOS technology.
Adaptive Low-Power Circuits for Wireless Communications
Adaptive radio transceivers require a comprehensive theoretical framework in order to optimize their performance. Adaptive Low-Power Circuits for Wireless Communications provides this framework with a discussion of joint optimization of Noise Figure and Input Intercept Point in receiver systems. Original techniques to optimize voltage controlled oscillators and low-noise amplifiers to minimize their power consumption while maintaining adequate system performance are also provided. The experimental results presented at the end of the book confirm the utility of the proposed techniques.
