الصفحة 1
الصفحة 1
High-Performance Modelling and Simulation for Big Data Applications: Selected Results of the COST Action IC1406 cHiPSet
This book is the final compendium of case studies emanated from “High-Performance Modelling and Simulation for Big Data Applications” (cHiPSet).cHiPSet has created a sustainable reference network linking applied research in High Performance Computing (HPC) and Modelling & Simulation to tangibly address Big Data challenges.cHiPSet has also endeavoured to use and exploit results through Open Science practices, i.e., open access publication, open access to data repositories, and open-source software development. A testament to this philosophy, this compendium is set to become a required reference for the fast-changing fields of HPC, Big Data, and Modelling & Simulation.
High-Level Synthesis : From Algorithm to Digital Circuit
This book presents an excellent collection of contributions addressing different aspects of high-level synthesis from both industry and academia. High-Level Synthesis: from Algorithm to Digital Circuit should be on each designer’s and CAD developer’s shelf, as well as on those of project managers who will soon embrace high level design and synthesis for all aspects of digital system design.
High performance embedded architectures and compilers ; 3rd International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008. Proceedings
This book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008. The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions. The papers are organized in topical sections on Multithreaded and Multicore Processors, Reconfigurable - ASIP, Compiler Optimizations, Industrial Processors and Application Parallelization, Power-Aware Techniques, High-Performance Processors, Profiles: Collection and Analysis as well as Optimizing Memory Performance.
Fundamentals of switching theory and logic design : A hands on approach
Switching theory and logic design provide mathematical foundations and tools for digital system design that is an essential part in the research and development in almost all areas of modern technology. The vast complexity of modern digital systems implies that they can only be handled by computer aided design tools that are built on sophisticated mathematical models. Fundamentals of Switching Theory and Logic Design is aimed at providing an accessible introduction to these mathematical techniques that underlie the design tools and that are necessary for understanding their capabilities and limitations.
Evolvable systems : From biology to hardware ; 8th International Conference, ICES 2008, Prague, Czech Republic, September 21-24, 2008. Proceedings
This book constitutes the refereed proceedings of the 8th International Conference on Evolvable Systems, ICES 2008, held in Prague, Czech Republic, in September 2008.The 28 revised full papers and 14 revised poster papers presented were carefully reviewed and selected from 52 submissions. The papers are organized in topical sections on evolution of analog circuits, evolution of digital circuits, hardware-software codesign and platforms for adaptive systems, evolutionary robotics, development, real-world applications, evolutionary networking, evolvable artificial neural networks, and transistor-level circuit evolution.
Job Scheduling Strategies for Parallel Processing ; 13th International Workshop, JSSPP 2007, Seattle, WA, USA, June 17, 2007. Revised Papers
Constitutes the thoroughly refereed post-workshop proceedings of the 13th International Workshop on Job Scheduling Strategies for Parallel Processing, JSSPP 2007, held in Seattle, WA, USA, in June 2007, in conjunction with the 21st ACM International Conference on Supercomputing, ICS 2007.The 10 revised full research papers presented went through the process of strict reviewing and subsequent improvement. The papers cover all current issues of job scheduling strategies for parallel processing from the supercomputer-centric viewpoint but also address many nontraditional high-performance computing and parallel environments that cannot or need not access a traditional supercomputer.
