الصفحة 2
الصفحة 2
High-Performance Energy-Efficient Microprocessor Design
High Performance Energy Efficient Microprocessor Design is intended to be a useful companion book for every design engineer working in the related areas and a source of technical information as well as a comprehensive reference in the field. It should also serve as the source book for technical and business managers involved in microprocessor based design and manufacture. The chapters are organized in a way which makes it possible to use this book as a textbook for graduate courses in advanced digital and system design. The book is intended to highlight practical problems encountered in designing state of the art processors, while yet covering fundamental principles that are independent of technology.
High performance embedded architectures and compilers ; 3rd International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008. Proceedings
This book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008. The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions. The papers are organized in topical sections on Multithreaded and Multicore Processors, Reconfigurable - ASIP, Compiler Optimizations, Industrial Processors and Application Parallelization, Power-Aware Techniques, High-Performance Processors, Profiles: Collection and Analysis as well as Optimizing Memory Performance.
High performance embedded architectures and compilers ; 2nd International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007. Proceedings
This book constitutes the refereed proceedings of the Second International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2007, held in Ghent, Belgium, in January 2007. The 19 revised full papers presented together with one invited keynote paper were carefully reviewed and selected from 65 submissions.
High performance embedded architectures and compilers ; 1st International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings
The ProgramCommittee received a total of 84 submissions; only 17 were selected for presentation as full-length papers and another one as an invited paper. Each paper was rigorously reviewed by three ProgramCommittee members and at least one external referee. Many reviewers spent a great amount of e?ort to provide detailed feedback. In many cases, such feedback along with constructive shepherding resulted in dramatic improvement in the quality of accepted papers. The names of the Program Committee m- bers and the referees are listed in the proceedings. The net result of this team e?ort is that the symposium proceedings include outstanding contributions by authors from nine countries in three continents. In addition to paper presentations, this ?rst HiPEAC conference featured two keynotes delivered by prominent researchers from industry and academia.
High performance computing and communications ; 3rd International Conference, HPCC 2007, Houston, USA, September 26-28, 2007, Proceedings
The 75 revised full papers address all current issues of parallel and distributed systems and high performance computing and communication, including networking protocols, embedded systems, wireless, mobile and pervasive computing, Web services and internet computing, and programming interfaces for parallel systems.
High performance computing - HiPC 2006 ; 13th International Conference Bangalore, India, December 18-21, 2006, Proceedings
Coverage in this volume includes scheduling and load balancing, network and distributed algorithms, application software, network services, ad-hoc networks, systems software, sensor networks and performance evaluation, as well as routing and data management algorithms.
High performance computing – HiPC 2005 ; 12th International Conference, Goa, India, December 18-21, 2005, Proceedings
Contains the refereed proceedings of the 12th International Conference on High-Performance Computing. Beginning with the keynote section and the presentation of the 2 awarded best contributions, this book is organized in topical sections on algorithms, applications, architecture, systems software, communication networks, and systems and networks.
Hardware and software : Verification and testing ; 1st International Haifa Verification Conference, Haifa, Israel, November 13-16, 2005, Revised Selected Papers
The First Haifa Verification Conference was held at the IBM Haifa Research Lab and at the Haifa University in Israel from November 13 to16, 2005. The conference incorporated three different workshops that took place separately in previous years. The IBM Verification Workshop is now its sixth year, the IBM Software Testing Workshop is now in its fourth year, and the PADTAD Workshop on testing and debugging multi-threaded and parallel software was held for the third time. The Verification Conference was a three-day, single-track conference followed by a one-day tutorial on the testing and review of multi-threaded code. The conference presented a unique combination of fields that brought together the hardware and software testing communities. Merging the different communities under a single roof gave the conference a distinctive flavor and provided the participants with added benefits. While the applications in these separate fields are different, the techniques used are often very similar. By offering lectures in these disparate but related disciplines, the conference engendered an environment of collaboration and discovery.
Global Specification and Validation of Embedded Systems : Integrating Heterogeneous Components
Global modelling and validation is required to master the design of systems made of heterogeneous components. These systems are now omnipresent in our life, and they may be found in several domains such as communications (ex. mobile terminals, optical switches), health (e.g. cardiac stimulators, cochlear implants), transportation (ex. automotive and aeronautical), etc. The main difficulties for their design are modelling and validation of the interactions between different components (hardware, software, analogue, RF, optical and micro-mechanical).
Fundamental approaches to software engineering ; 25th International Conference, FASE 2022, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2022, Munich, Germany, April 2–7, 2022, Proceedings
The papers deal with the foundations on which software engineering is built, including topics like software engineering as an engineering discipline, requirements engineering, software architectures, software quality, model-driven development, software processes, software evolution, AI-based software engineering, and the specification, design, and implementation of particular classes of systems, such as (self-)adaptive, collaborative, AI, embedded, distributed, mobile, pervasive, cyber-physical, or service-oriented applications.
Fundamental approaches to software engineering ; 24th International Conference, FASE 2021, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2021, Luxembourg City, Luxembourg, March 27 – April 1, 2021, Proceedings
This book constitutes the proceedings of the 24th International Conference on Fundamental Approaches to Software Engineering, FASE 2021, which took place during March 27–April 1, 2021, and was held as part of the Joint Conferences on Theory and Practice of Software, ETAPS 2021.
Fundamental approaches to software engineering ; 23rd International Conference, FASE 2020, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2020, Dublin, Ireland, April 25–30, 2020, Proceedings
This book constitutes the proceedings of the 23rd International Conference on Fundamental Approaches to Software Engineering, FASE 2020, which took place in Dublin, Ireland, in April 2020, and was held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2020. The 23 full papers, 1 tool paper and 6 testing competition papers presented in this volume were carefully reviewed and selected from 81 submissions.
Functional Verification of Programmable Embedded Architectures : A Top-Down Approach
This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect’s knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric.
From Specification to Embedded Systems Application
Application documents recent approaches and results presented at the International Embedded Systems Symposium (IESS 2005), which was held in August 2005 in Manaus (Brazil) and sponsored by International Federation for Information Processing (IFIP). The topics which have been chosen for this working conference are very timely: design methodology, modeling, specification, software synthesis, power management, formal verification, testing, network, communication systems, distributed control systems, resource management and special aspects in system design.
From model-driven design to resource management for distributed embedded systems ; IFIP TC 10 Working conference on distributed and parallel embedded systems (DIPES 2006) October 11-13, 2006, Braga, Portugal
From Model-Driven Design to Resource Management for Distributed Embedded Systems contains 16 original contributions as well as 12 invited papers by distinguished invited speakers. These papers were presented at the Working Conference on Distributed and Parallel Embedded Systems (DIPES 2006), which was held in October 2006 in Braga, Portugal, and sponsored by the International Federation for Information Processing (IFIP). This volume covers the following very timely topics: model-driven design, test and evolution of embedded systems, timing analysis and predictability, scheduling, allocation, communication and resource management in distributed real-time systems.
Formal Techniques for Networked and Distributed Systems - FORTE 2008 ; 28th IFIP WG 6.1 International Conference Tokyo, Japan, June 10-13, 2008 Proceedings
This book constitutes the refereed proceedings of the 28th IFIP WG 6.1 International Conference on Formal Techniques for Networked and Distributed Systems, FORTE 2008, held in Tokyo, Japan, in June 2008 co-located with TestCom/FATES 2008.The 19 revised full papers and 1 revised short paper presented together with 1 invited talk were carefully reviewed and selected from 44 submissions. The papers cover new approaches, concepts and experience in the application of formal methods for the specification and verification of distributed systems and applications.
Formal Techniques for Networked and Distributed Systems - FORTE 2006 ; 26th IFIP WG 6.1 International Conference, Paris, France, September 26-29, 2006, Proceedings
This book constitutes the refereed proceedings of the 26th IFIP WG 6.1 International Conference on Formal Techniques for Networked and Distributed Systems, FORTE 2006, held in Paris, France, in September 2006. The 26 revised full papers and 4 short papers presented together with 3 invited lectures were carefully reviewed and selected from 177 submissions. The papers focus on the construction of middleware and services using formalised and verified approaches.
Formal techniques for networked and distributed systems - FORTE 2005 ; 25th IFIP WG 6.1 International Conference, Taipei, Taiwan, October 2-5, 2005, Proceedings
FORTE (Formal Techniques for Networked and Distributed Systems) 2005 was sp- sored by Working Group 6.1, Technical Committee 6 (TC6) of the International Fed- ation for InformationProcessing (IFIP).The conferenceseries started in 1981underthe name PSTV (ProtocolSpeci?cation, Testing, and Veri?cation).In 1988,a second series under the name FORTE was started. Both series merged to FORTE/PSTV in 1996. The conference name was changed to FORTE in 2001. During its 24-year history, many important contributions have been reported in the conference series. The last ?ve me- ings of FORTE were held in Pisa (Italy), Cheju Island (Korea), Houston (USA), Berlin (Germany), and Madrid (Spain). The 25th FORTE was held from Sunday to Wednesday, October 2–5, 2005 on the beautiful campus of the National Taiwan University (NTU), Taipei, Taiwan, ROC.
Formal techniques for distributed objects, components, and systems ; 40th IFIP WG 6.1 International conference, FORTE 2020, Held as Part of the 15th International Federated Conference on distributed computing techniques, DisCoTec 2020, Valletta, Malta, June 15–19, 2020, Proceedings
This book constitutes the proceedings of the 40th IFIP WG 6.1 International Conference on Formal Techniques for Distributed Objects, Components, and Systems, FORTE 2020, held in Valletta, Malta, in June 2020, as part of the 15th International Federated Conference on Distributed Computing Techniques, DisCoTec 2020.*
Formal Modeling and Analysis of Timed Systems ; Vol. 3829 ; 3rd International Conference, FORMATS 2005, Uppsala, Sweden, September 26-28, 2005, Proceedings
This book constitutes the thoroughly refereed post-proceedings of the Third International Conference on Formal Modeling and Analysis of Timed Systems, FORMATS 2005, held in Uppsala, Sweden in September 2005 in conjunction with ARTIST2 summer school on Component Modelling, Testing and Verification, and Static analysis of embedded systems. The 19 revised full papers presented together with the abstracts of 3 invited talks were carefully selected from 43 submissions. The papers cover work on semantics and modeling of timed systems, formalisms for modeling and verification including timed automata, hybrid automata, and timed petri nets, games for verification and synthesis, model-checking, case studies and issues related to implementation, security and performance analysis.
