A Platform-Centric Approach to System-on-Chip (SOC) Design
The book proposes a new methodology for realizing platform-centric design of complex systems, and presents a detailed plan for its implementation. The proposed plan allows component vendors, system integrators and product developers to collaborate effectively and efficiently to create complex products within budget and schedule constraints.
Low Power Methodology Manual : For System-on-Chip Design
"Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach." "Excellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition to the field of low power SoC implementation that has for many years operated in a largely ad-hoc fashion."
Applications of Specification and Design Languages for SoCs : Selected papers from FDL 2005
This book provides detailed insights into recent works dealing with a large spectrum of issues in system-on-chip design, namely: assertion-based design, mapping on network-on-chip architectures, use of C/C++/SystemC design methodologies, hardware/software integration, mixing heterogeneous models of computation, analog/mixed-signal/mixed-technology system design and verification, UML/XML-based synthesis of analog and mixed-signal systems, UML to VHDL mapping, UML-based performance modeling, model transformation and formal verification, real-time system models, and Model Driven Architecture.
Advances in Electronic Testing : Challenges and Methodologies
The book is a comprehensive elaboration on important topics which capture major research and development efforts today. The motivation and inspiration behind this book is to deliver a thorough text that focuses on the evolution of test technology, provides insight about the abiding importance of discussed topics, records today’s state of the art and industrial practices and trends, reveals the challenges for emerging testing methodologies, and envisages the future of this journey. The book consists of eleven edited chapters written by experts in Defect-Oriented Testing, Nanometer Technologies Failures and Testing, Silicon Debug, Delay Testing, High-Speed Test Interfaces, DFT-Oriented Low-Cost Testers, Embedded Cores and System-on-Chip Testing, Memory Testing, Mixed-Signal Testing, RF Testing and Loaded Board Testing.
Advanced memory optimization techniques for low-power embedded processors
this book explores a collaborative approach by proposing novel memory hierarchies and software optimization techniques for the optimal utilization of these memory hierarchies. Linking memory architecture design with memory-architecture aware compilation results in fast, energy-efficient and timing predictable memory accesses.The evaluation of the optimization techniques using real-life benchmarks for a single processor system, a multiprocessor system-on-chip (SoC) and for a digital signal processor system, reports significant reductions in the energy consumption and performance improvement of these systems. The book presents a wide range of optimizations, progressively increasing in the complexity of analysis and of memory hierarchies. The final chapter covers optimization techniques for applications consisting of multiple processes found in most modern embedded devices.




