Low Power Methodology Manual
Publication year: 2007
ISBN: 978-0-387-71819-4
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"Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach." "Excellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition to the field of low power SoC implementation that has for many years operated in a largely ad-hoc fashion."
Subject: Engineering, Aitken, Keating, Low Power Methodology, SoC, Software, Standard, System-on-Chip, UPF, development, network, power gating, power management, semiconductor, system on chip (SoC), unified power format
