Scalable Hardware Verification with Symbolic Simulation
Publication year: 2006
ISBN: 978-0-387-29906-8
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Scalable Hardware Verification with Symbolic Simulation presents recent advancements in symbolic simulation-based solutions which radically improve scalability. It overviews current verification techniques, both based on logic simulation and formal verification methods, and unveils the inner workings of symbolic simulation.
Subject: Engineering, CAD, Hardware, algorithms, automation, complexity, computer, computer-aided design (CAD), design automation, formal verification, hardware verification, logic, network, performance, simulation
