High Performance Embedded Architectures and Compilers : Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008. Proceedings
Publication year: 2008
ISBN: 978-3-540-77560-7
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This book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008. The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions. The papers are organized in topical sections on Multithreaded and Multicore Processors, Reconfigurable - ASIP, Compiler Optimizations, Industrial Processors and Application Parallelization, Power-Aware Techniques, High-Performance Processors, Profiles: Collection and Analysis as well as Optimizing Memory Performance.
Subject: Computer Science, Compiler, Random Access Memory, Variable, algorithms, compiler techniques, complexity, computer architecture, dataflow programming, dynamic compilation, embedded systems, extensible processors, high-performance architecture, memory system optimization, network computing, processor, Arithmetic and Logic Structures, Programming Languages, Compilers, Interpreters, Computer System, Implementation, Processor Architectures, Input, Output and Data Communications, Logic Design
