Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Publication year: 2008
ISBN: 978-0-387-76474-0
Internet Resource: Please Login to download book
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits.
Subject: Engineering, Architectural power estimation, CMOS, High-level synthesis, Logic gate levels, Low-power synthesis, Nanoscale CMOS, Transient power, Transistor
