CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies : Process-Aware SRAM Design and Test
Publication year: 2008
: 978-1-4020-8363-1
CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies covers a broad range of topics related to SRAM design and test. From SRAM operation basics through cell electrical and physical design to process-aware and economical approach to SRAM testing.
: Engineering, CMOS, DOM, RAM, SRAM, Transistor, integrated circuit, static-induction transistor, Circuits and Systems, Memory Structures
