الصفحة 1
الصفحة 1
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Nanoscaled Semiconductor-on-Insulator Structures and Devices

This proceedings volume constitutes an archive of the contributions of the key-speakers who attended the NATO Advanced Research Workshop on “Nanoscaled Semiconductor-On-Insulator Structures and devices” held in the Tourist and Recreation Centre “Sudak” (Crimea, Ukraine) from 15 to 19 October 2006. The semiconductor industry has sustained a very rapid growth during the last three decades through impressive technological developments which have resulted in products with higher performance and lower cost per function. After many years of development it is now confidently predicted that semiconductor-on-insulator materials will enter and increasingly be used by manufacturing industry. The wider use of semiconductor (es- cially silicon) on insulator materials will not only enable the benefits of these materials to be demonstrated but, also, will drive down the cost of substrates which, in turn, will stimulate the development of other novel devices and applications.

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Model and Design of Bipolar and MOS Current-Mode Logic : CML, ECL and SCL Digital Circuits

many works and results have been published which reinforce the importance of Current-Mode digital circuits. In the topic of Current-Mode digital circuits, the authors properly exploited classical paradigms developed and used in the analog circuit domain (a topic in which one of the authors maturated a great experience).

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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation ; Vol. 4148 ; 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedings

Welcome to the proceedings of PATMOS 2006, the 16th in a series of international workshops. PATMOS 2006 was organized by LIRMM with CAS technical - sponsorship and CEDA sponsorship. Over the years, the PATMOS workshop has evolved into an important European event, where researchers from both industry and academia discuss and investigate the emerging challenges in future and contemporary applications, design methodologies, and tools required for the development of upcoming generations of integrated circuits and systems. The technical program of PATMOS 2006 contained state-of-the-art technical contributions, three invited talks, a special session on hearing-aid design, and an embedded tutorial. The technical program focused on timing, performance and power consumption, as well as architectural aspects with particular emphasis on modeling, design, characterization, analysis and optimization in the nanometer era. The Technical Program Committee, with the assistance of additional expert reviewers, selected the 64 papers presented at PATMOS. The papers were organized into 11 technical sessions and 3 poster sessions. As is always the case with the PATMOS workshops, full papers were required, and several reviews were received per manuscript.

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High Dielectric Constant Materials : VLSI MOSFET Applications

Issues relating to the high-K gate dielectric are among the greatest challenges for the evolving International Technology Roadmap for Semiconductors (ITRS). More than just an historical overview, this book will assess previous and present approaches related to scaling the gate dielectric and their impact, along with the creative directions and forthcoming challenges that will define the future of gate dielectric scaling technology. Topics include: an extensive review of Moore's Law, the classical regime for SiO2 gate dielectrics; the transition to silicon oxynitride gate dielectrics; the transition to high-K gate dielectrics (including the drive towards equivalent oxide thickness in the single-digit nanometer regime); and future directions and issues for ultimate technology generation scaling. The vision, wisdom, and experience of the team of authors will make this book a timely, relevant, and interesting, resource focusing on fundamentals of the 45 nm Technology Generation and beyond.

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Fully-Depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications

Fully-depleted SOI CMOS Circuits and Technology for Ultralow-Power Applications addresses the problem of reducing the supply voltage of conventional circuits for ultralow-power operation and explains power-efficient MTCMOS circuit design for FD-SOI devices at a supply voltage of 0.5 V. The topics include the minimum required knowledge of the fabrication of SOI substrates; FD-SOI devices and the latest developments in device and process technologies; and ultralow-voltage circuits, such as digital circuits, analog/RF circuits, and DC-DC converters. Each ultra-low-power technique related to devices and circuits is fully explained using figures to help understanding.

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Fault Diagnosis of Analog Integrated Circuits

Fault Diagnosis of Analog Integrated Circuits is a textbook for advanced undergraduate and graduate level students as well as practicing engineers. The objective of this book is to study the testing and fault diagnosis of analog and analog part of mixed signal circuits. A background in analog integrated circuit, artificial neural network is desirable but not essential.

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Matching Properties of Deep Sub-Micron MOS Transistors

Matching Properties of Deep Sub-Micron MOS Transistors examines this interesting phenomenon. Microscopic fluctuations cause stochastic parameter fluctuations that affect the accuracy of the MOSFET. For analog circuits this determines the trade-off between speed, power, accuracy and yield.

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Low-Frequency Noise in Advanced MOS Devices

Low-Frequency Noise in Advanced CMOS Devices begins with an introduction to noise, describing the fundamental noise sources and basic circuit analysis. The characterization of low-frequency noise is discussed in detail and useful practical advice is given. The various theoretical and compact low-frequency (1/f) noise models in MOS transistors are treated extensively providing an in-depth understanding of the low-frequency noise mechanisms and the potential sources of the noise in MOS transistors. Advanced CMOS technology including nanometer scaled devices, strained Si, SiGe, SOI, high-k gate dielectrics, multiple gates and metal gates are discussed from a low-frequency noise point of view. Some of the most recent publications and conference presentations are included in order to give the very latest view on the topics. The book ends with an introduction to noise in analog/RF circuits and describes how the low-frequency noise can affect these circuits.

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Analog integrated circuits for communication : principles, simulation and design

This book covers the analysis and design of nonlinear analog integrated circuits that form the basis of present-day communication systems. Both bipolar and MOS transistor circuits are analyzed and several numerical examples are used to illustrate the analysis and design techniques developed in this book.

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