Fault Diagnosis and Tolerance in Cryptography ; 3rd International Workshop, FDTC 2006, Yokohama, Japan, October 10, 2006, Proceedings

Fault Diagnosis and Tolerance in Cryptography ; 3rd International Workshop, FDTC 2006, Yokohama, Japan, October 10, 2006, Proceedings


The sophistication of the underlying cryptographic algorithms, the high complexity of the implementations, and the easy access and low cost of cryptographic devices resulted in increased concerns regarding the reliability and security of crypto-devices. The effectiveness of side channel attacks on cryptographic devices, like timing and power-based attacks, has been known for some time. Several recent investigations have demonstrated the need to develop methodologies and techniques for designing robust cryptographic systems (both hardware and software) to protect them against both accidental faults and maliciously injected faults with the purpose of extracting the secret key. This trend has been particularly motivated by the fact that the equipment needed to carry out a successful side channel attack based on fault injection is easily accessible at a relatively low cost (for example, laser beam technology), and that the skills needed to use it are quite common.



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