الصفحة 2
الصفحة 2
Analog Circuit Design : High-Speed A-D Converters, Automotive Electronics and Ultra-Low Power Wireless
This book is number 15 in this successful series of Analog Circuit Design, providing valuable information and excellent overviews of analog circuit design and related CAD, mainly in the fields of basic analog modules, mixed-signal electronics, AD and DA converters, RF systems, and automotive electronics.
Advances in Electronic Testing : Challenges and Methodologies
The book is a comprehensive elaboration on important topics which capture major research and development efforts today. The motivation and inspiration behind this book is to deliver a thorough text that focuses on the evolution of test technology, provides insight about the abiding importance of discussed topics, records today’s state of the art and industrial practices and trends, reveals the challenges for emerging testing methodologies, and envisages the future of this journey. The book consists of eleven edited chapters written by experts in Defect-Oriented Testing, Nanometer Technologies Failures and Testing, Silicon Debug, Delay Testing, High-Speed Test Interfaces, DFT-Oriented Low-Cost Testers, Embedded Cores and System-on-Chip Testing, Memory Testing, Mixed-Signal Testing, RF Testing and Loaded Board Testing.
Advanced memory optimization techniques for low-power embedded processors
this book explores a collaborative approach by proposing novel memory hierarchies and software optimization techniques for the optimal utilization of these memory hierarchies. Linking memory architecture design with memory-architecture aware compilation results in fast, energy-efficient and timing predictable memory accesses.The evaluation of the optimization techniques using real-life benchmarks for a single processor system, a multiprocessor system-on-chip (SoC) and for a digital signal processor system, reports significant reductions in the energy consumption and performance improvement of these systems. The book presents a wide range of optimizations, progressively increasing in the complexity of analysis and of memory hierarchies. The final chapter covers optimization techniques for applications consisting of multiple processes found in most modern embedded devices.
Adaptive Techniques for Mixed Signal System on Chip
Adaptive Techniques for Mixed Signal Sytem on Chip discusses the concept of adaptation in the context of analog and mixed signal design along with different adaptive architectures used to control any system parameter. The first part of the book gives an overview of the different elements that are normally used in adaptive designs including tunable elements as well as voltage, current, and time references with an emphasis on the circuit design of specific blocks such as voltage-controlled transconductors, offset comparators, and a novel technique for accurate implementation of on chip resistors. While the first part of the book addresses adaptive techniques at the circuit and block levels, the second part discusses adaptive equalization architectures employed to minimize the impact of ISI (Intersymbol Interference) on the quality of received data in high-speed wire line transceivers. It presents the implementation of a 125Mbps transceiver operating over a variable length of Category 5 (CAT-5) Ethernet cable as an example of adaptive equalizers.
A Practical Guide for SystemVerilog Assertions
SystemVerilog language consists of three very specific areas of constructs - design, assertions and testbench. This guide shows how to use the language to solve real verification problems. It examines how to verify complex protocols and memories using SVA with seeral examples.
A Platform-Centric Approach to System-on-Chip (SOC) Design
The book proposes a new methodology for realizing platform-centric design of complex systems, and presents a detailed plan for its implementation. The proposed plan allows component vendors, system integrators and product developers to collaborate effectively and efficiently to create complex products within budget and schedule constraints.
