الصفحة 1
الصفحة 1
CMOS PLL synthesizers : Analysis and design
CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state-of-the-art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis is given. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance multiplier, which tackle speed and integration bottlenecks of PLL synthesizers." "This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers.
Clock Generators for SOC Processors : Circuits and Architectures
On the architectural level, the discussion includes PLL analysis using continuous-time as well as discre- time models, linear and nonlinear effects of PLL performance, and detailed analysis of locking behavior.
