تحسين النتائح
ترتيب حسب
من
الى
الصفحة 1
الصفحة 1
Machine Learning and Cognitive Computing for Mobile Communications and Wireless Networks
Communication and network technology has witnessed recent rapid development and numerous information services and applications have been developed globally. These technologies have high impact on society and the way people are leading their lives. The advancement in technology has undoubtedly improved the quality of service and user experience yet a lot needs to be still done. Some areas that still need improvement include seamless wide-area coverage, high-capacity hot-spots, low-power massive-connections, low-latency and high-reliability and so on. Thus, it is highly desirable to develop smart technologies for communication to improve the overall services and management of wireless communication. Machine learning and cognitive computing have converged to give some groundbreaking solutions for smart machines. With these two technologies coming together, the machines can acquire the ability to reason similar to the human brain. The research area of machine learning and cognitive computing cover many fields like psychology, biology, signal processing, physics, information theory, mathematics, and statistics that can be used effectively for topology management. Therefore, the utilization of machine learning techniques like data analytics and cognitive power will lead to better performance of communication and wireless systems.
Body Sensor Networks
While the problems of long-term stability and biocompatibility are being addressed, several promising prototypes are starting to emerge for managing patients with acute diabetes, for treatment of epilepsy and other debilitating neurological disorders and for monitoring of patients with chronic cardiac diseases. Despite the technological developments in sensing and monitoring devices, issues related to system integration, sensor miniaturization, low-power sensor interface circuitry design, wireless telemetric links and signal processing still have to be investigated.
Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS
At the system level, a novel systematic study on the full feedforward Sigma-Delta topology is presented in this book. As a design example, a fourth-order single-loop full feedforward Sigma-Delta modulator design in a 130-nm pure digital CMOS technology is presented. This design is the first design using the full feedforward Sigma-Delta topology and reaches the highest conversion speed among all the 1-V Sigma-Delta modulators to date.
Low-Power High-Speed ADCs for Nanometer CMOS Integration
Low-Power High-Speed ADCs for Nanometer CMOS Integration is about the design and implementation of ADC in nanometer CMOS processes that achieve lower power consumption for a given speed and resolution than previous designs, through architectural and circuit innovations that take advantage of unique features of nanometer CMOS processes. A phase lock loop (PLL) clock multiplier has also been designed using new circuit techniques and successfully tested.
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits.
Low Power Methodology Manual : For System-on-Chip Design
"Tools alone aren't enough to reduce dynamic and leakage power in complex chip designs - a well-planned methodology is needed. Following in the footsteps of the successful Reuse Methodology Manual (RMM), authors from ARM and Synopsys have written this Low Power Methodology Manual (LPMM) to describe [such] [a] low-power methodology with a practical, step-by-step approach." "Excellent compendium of low-power techniques and guidelines with balanced content spanning theory and practical implementation. The LPMM is a very welcome addition to the field of low power SoC implementation that has for many years operated in a largely ad-hoc fashion."
Advanced memory optimization techniques for low-power embedded processors
this book explores a collaborative approach by proposing novel memory hierarchies and software optimization techniques for the optimal utilization of these memory hierarchies. Linking memory architecture design with memory-architecture aware compilation results in fast, energy-efficient and timing predictable memory accesses.The evaluation of the optimization techniques using real-life benchmarks for a single processor system, a multiprocessor system-on-chip (SoC) and for a digital signal processor system, reports significant reductions in the energy consumption and performance improvement of these systems. The book presents a wide range of optimizations, progressively increasing in the complexity of analysis and of memory hierarchies. The final chapter covers optimization techniques for applications consisting of multiple processes found in most modern embedded devices.
Adaptive Multi-Standard RF Front-Ends
Adaptive Multi-Standard RF Front-Ends investigates solutions, benefits, limitations and costs related to multi-standard operation of RF front-ends and their adaptivity to variable radio environments. Next, it highlights the optimization of RF front-ends that allow achieving of maximal performance with a certain power budget while targeting full integration. Also, it investigates possibilities for low-voltage low-power circuit topologies in CMOS technology.
Adaptive Low-Power Circuits for Wireless Communications
Adaptive radio transceivers require a comprehensive theoretical framework in order to optimize their performance. Adaptive Low-Power Circuits for Wireless Communications provides this framework with a discussion of joint optimization of Noise Figure and Input Intercept Point in receiver systems. Original techniques to optimize voltage controlled oscillators and low-noise amplifiers to minimize their power consumption while maintaining adequate system performance are also provided. The experimental results presented at the end of the book confirm the utility of the proposed techniques.
